不能在内核模块生成文件中使用通配符 [英] Cannot use wildcard in kernel module makefile

问题描述

我对 Makefile 和内核模块非常熟悉，但最近我在我的 Makefile 中遇到了一个没有任何意义的问题——使用通配符.为了证明这一点，我正在从头开始编译一个 hello world 内核模块.目录结构是这样的:

I am pretty familiar with Makefiles and kernel modules, but recently I got a problem in my Makefile that doesn't make any sense -- on using wildcards. To demonstrate this, I am compiling a hello world kernel module from scratch. The directory structure is like this:

hello_mod/
   | 
   --- hello.c
   |
   --- Makefile

这是实际的makefile:

Here is the actual makefile :

CFILES := $(wildcard hello.c*)
#CFILES := hello.c
OBJS := $(CFILES:.c=.o)

KSRC := /lib/modules/$(shell uname -r)/build

obj-m += hello_world.o
hello_world-y := $(OBJS)

all:    
        @echo $(CFILES)
        $(MAKE) -C $(KSRC) M=$$PWD modules

clean:
        $(MAKE) -C $(KSRC) M=$$PWD clean

.PHONY: clean

问题是，即使已注释的 $(CFILES) 和未注释的 $(CFILES) 完全相同，但在使用第一个 $(CFILES) 时构建失败并出现以下错误:

The problem is that even though the commented $(CFILES) and the uncommented $(CFILES) are exactly the same, the build fails on using the first $(CFILES) with the following error:

*** No rule to make target `/home/test/hello_mod/hello_world.c', needed by
/home/test/hello_mod/hello_world.o'.  Stop.

如果使用了注释的 $(CFILES)，它就可以完美运行.

If the commented $(CFILES) is used, it works perfectly.

如果有人想对此进行测试，我将包含 hello world 源代码 hello.c :

If someone wants to test this out, I'm including the source for the hello world source which is hello.c :

#include <linux/kernel.h>
#include <linux/module.h>

static int mod_init()
{
        printk("Hello
");
        return 0;
}

static void mod_exit()
{
        printk("Bye world
");    
}

module_init(mod_init);
module_exit(mod_exit);

有谁知道它为什么会这样?我需要在 makefile 中使用通配符.任何帮助将不胜感激.

Does anyone know why it is behaving as such? And I need to use wildcards in the makefile. Any help will be appreciated.

推荐答案

这里有两个问题.第一个实际上只依赖于 KSRC 变量和递归调用.第二个 make 只需要 CFILES、OBJS、obj-m 和 hello_world-y 变量，并且不需要不要使用 all: 目标.因此，您的调试显示，第一个 Make 的 CFILES 设置正确，没有使用它，并且没有在第二个 make 中显示它.

There are two makes happening here. The first really only relies on the KSRC variable and the recursive make call. The second make only needs the CFILES, OBJS, obj-m, and hello_world-y variables, and doesn't make use of the all: target. So your debug is showing that CFILES is set correctly for the first Make, where it's not being used, and is not showing it in the second make, where it is.

您正在从不同的目录扩展通配符，并且没有选择正确的文件.试试这个 CFILES:

You're wildcard expanding from a different directory, and not picking up the right files. Try this for CFILES:

CFILES := $(notdir $(wildcard $M/hello.c*))

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