转储x86 CPU的TLB缓冲区的内容 [英] Dump the contents of TLB buffer of x86 CPU

问题描述

是否可以从TLB(翻译后备缓冲区，这是CPU中的特殊缓存)获取翻译列表(从虚拟页面到物理页面).我的意思是现代的x86或x86_64；我想以编程的方式做到这一点，而不是通过使用JTAG并将所有TLB条目移出.

Is it possible to get list of translations (from virtual pages into physical pages) from TLB (Translation lookaside buffer, this is a special cache in the CPU). I mean modern x86 or x86_64; and I want to do it in programmatic way, not by using JTAG and shifting all TLB entries out.

推荐答案

Linux内核没有这样的转储程序，Linux内核中有关于缓存和tlb的页面:

The linux kernel has no such dumper, there is page from linux kernel about cache and tlb: https://www.kernel.org/doc/Documentation/cachetlb.txt "Cache and TLB Flushing Under Linux." David S. Miller

在80386DX(和80486，甚至在100-166 MHz的嵌入式奔腾"中，都有这样的TLB转储/"

There was an such TLB dump in 80386DX (and 80486, and possibly in "Embedded Pentium" 100-166 MHz / "Embedded Pentium MMX 200-233 MHz" in 1998):

• 1 -预订微处理机:8086/8088、80186/80286、80386/80486和奔腾系列"，ISBN 9788120339422，2010年，第579页

• 1 - Book "MICROPROCESSORS: THE 8086/8088, 80186/80286, 80386/80486 AND THE PENTIUM FAMILY", ISBN 9788120339422, 2010, page 579

这是通过测试寄存器TR6 TR7完成的:

This was done via Test Registers TR6 TR7:

• 2 -Godse& Godse撰写的微处理器和微控制器"，2008 ISBN 9788184312973页SA3-PA19:"3.2.7.3测试寄存器"只有两个测试寄存器(TR6-TR7)当前定义....这些寄存器用于检查分页单元的转换后备缓冲器(TLB)."
• 3 "x86-Programmierung und -Betriebsarten(Teil 5).删除Testregister TR6和TR7"，关于寄存器的详细文章:"ZurPrüfungdes Translation-Lookaside-Buffers zwei Testregister TR6和TR7vorhanden.Siewerden als Test-Command-Register(TR6)和Testdatenregister(TR7)bezeichnet .
• 4 英特尔的嵌入式奔腾®处理器系列开发人员手册"，第26部分特定于模型的寄存器和功能"，第8页"26.2.1.2 TLB测试寄存器"

• 2 - Book "Microprocessors & Microcontrollers" by Godse&Godse, 2008 ISBN 9788184312973 page SA3-PA19: "3.2.7.3 Test Registers" "only two test registers (TR6-TR7) are currently defined. ... These registers are used to check translation lookaside buffer (TLB) of the paging unit."
• 3 "x86-Programmierung und -Betriebsarten (Teil 5). Die Testregister TR6 und TR7", deutsche article about registers: "Zur Prüfung des Translation-Lookaside-Buffers sind die zwei Testregister TR6 und TR7 vorhanden. Sie werden als Test-Command-Register (TR6) und Testdatenregister (TR7) bezeichnet. "
• 4 Intel's "Embedded Pentium® Processor Family Developer’s Manual", part "26 Model Specific Registers and Functions" page 8 "26.2.1.2 TLB Test Registers"

TR6是命令寄存器，线性地址已写入其中.它可用于写入TLB或从TLB读取行. TR7是要写入TLB或从TLB读取的数据.

TR6 is command register, the linear address is written to it. It can be used to write to TLB or to read line from TLB. TR7 is data to be written to TLB or read from TLB.

Wikipedia在 https://en.wikipedia.org/wiki/Test_register 中说TR6/TR7在任何版本高于80486的CPU上生成无效的操作码异常."

Wikipedia says in https://en.wikipedia.org/wiki/Test_register that reading TR6/TR7 "generate invalid opcode exception on any CPU newer than 80486."

mov tr6/tr7的编码仅适用于特权级别0: http://www.fermimn.gov.it/linux/quarta/x86/movrs.htm

The encoding of mov tr6/tr7 was available only to privilege level 0: http://www.fermimn.gov.it/linux/quarta/x86/movrs.htm

0F 24 /r    movl tr6/tr7,r32    12  Move (test register) to (register)  
   movl %tr6,%ebx
   movl %tr7,%ebx
0F 26 /r    movl r32,tr6/tr7    12  Move (register) to (test register)  
   movl %ebx,%tr6
   movl %ebx,%tr7

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