cpu缓存性能。存储未命中与负载未命中 [英] cpu cache performance. store misses vs load misses
问题描述
我将perf用作基本事件计数器。我正在开发一个程序，该程序遭受数据缓存存储未命中的困扰。其中比例高达80％。
I'm using perf as basic event counter. I'm working on a program which suffers from data cache store misses. Which as as high as ratio of %80.
我知道高速缓存的原理。它会在各种未命中情况下从内存加载，并在需要时从缓存中删除数据。我不了解的是，存储和加载未命中之间有什么区别。它如何区别加载和存储。如何存储未命中？
I know how caches in principle work. It loads from memory on various miss cases, removes data from cache when it pleases. What I don't understand is , what is difference between store - load misses. How does it differ loading and storing. How can you store-miss ?
推荐答案
（如您所知）load-miss是指处理器何时需要获取数据来自主内存的数据，但缓存中不存在数据。因此，每当处理器要从主内存中获取一些数据时，它都会请求高速缓存，并且如果数据已经加载，则会遇到加载失败，否则会出现加载失败。
A load-miss (as you know) is referring to when the processor needs to fetch data from main memory, but data does not exist in the cache. So whenever the processor wants some data from the main memory, it esquires the cache, and if the data is already loaded you get a load-hit and otherwise you get a load-miss.
存储丢失与处理器何时要将新计算的数据写回到主存储器有关，何时要将数据写回到主存储器有关。内存，它必须确保缓存和主内存的内容彼此同步。您可以在此处找到两种不同的策略来实现：写作策略 。
A store-miss is related to when the processor wants to write back the newly calculated data to the main memory.When it wants to write-back the data to the main memory, it hasto make sure that the content of the cache and main memory are in sync with each other. It can happen with two different policies that you can find here: Writing Policies.
因此，无论您选择哪种策略，都首先需要检查数据是否已在缓存中，以便可以将其存储到缓存中（因为它更快），并且如果您要查找的数据块已从缓存中清除，您将获得与该缓存相关的存储缺失。
So no matter what policy you choose, you first need to check whether the data is already in the cache so you can store it to cache first (since it's faster), and if the data block you are looking for has been evicted from the cache, you get a store-miss related to that cache.
您可以检查此处的小程序，以更好地了解在不同情况下会发生什么。
You can check the applet here, to get a better idea of what happens in different scenarios.
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