TLB 未命中与缓存未命中? [英] TLB misses vs cache misses?

问题描述

有人能解释一下 TLB(翻译后备缓冲区)未命中和缓存未命中之间的区别吗?

Could someone please explain the difference between a TLB (Translation lookaside buffer) miss and a cache miss?

我相信我发现 TLB 指的是某种虚拟内存地址，但我并不太清楚这究竟意味着什么?

I believe I found out TLB refers to some sort of virtual memory address but I wasn't overly clear what this actually meant?

我了解当内存块(缓存行的大小)加载到(L3?)缓存中并且如果当前缓存行中未保存所需地址时会导致缓存未命中 - 这是缓存未命中.

I understand cache misses result when a block of memory (the size of a cache line) is loaded into the (L3?) cache and if a required address is not held within the current cache lines- this is a cache miss.

推荐答案

嗯，今天所有的现代操作系统都使用一种叫做虚拟内存的东西.CPU生成的每个地址都是虚拟的.存在将这种虚拟地址映射到物理地址的页表.而 TLB 只是页表条目的缓存.

Well, all of today's modern operating systems use something called virtual memory. Every address generated by CPU is virtual. There are page tables that map such virtual addresses to physical addressed. And a TLB is just a cache of page table entries.

另一方面，L1、L2、L3 缓存缓存主存内容.

On the other hand L1, L2, L3 caches cache main memory contents.

当虚拟内存地址的映射=>时发生TLB未命中.CPU 请求的虚拟地址的物理内存地址 不在 TLB 中.然后必须将该条目从页表中提取到 TLB 中.

A TLB miss occurs when the mapping of virtual memory address => physical memory address for a CPU requested virtual address is not in TLB. Then that entry must be fetched from page table into the TLB.

当 CPU 需要不在缓存中的内容时，就会发生缓存未命中.然后在主存储器 (RAM) 中查找数据.如果不存在，则必须从辅助内存(硬盘)中获取数据.

A cache miss occurs when the CPU requires something that is not in the cache. The data is then looked for in the primary memory (RAM). If it is not there, data must be fetched from secondary memory (hard disk).

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