缓存未命中、TLB 未命中和页面错误 [英] cache miss, a TLB miss and page fault
问题描述
谁能清楚地解释一下缓存未命中、tlb 未命中和页面错误之间的区别,以及它们如何影响有效内存访问时间?
Can someone clearly explain me the difference between a cache miss, a tlb miss and page fault, and how do these affect the effective memory access time?
推荐答案
让我一步一步解释所有这些事情.
Let me explain all these things step by step.
CPU 生成逻辑地址,其中包含页码
和页偏移
.
The CPU generates the logical address, which contains the page number
and the page offset
.
页码
用于索引到页表
中,得到对应的页框号
,一旦我们有了页面物理内存
(也称为主内存)的帧,我们可以应用页面偏移
来获得内存的正确字.
The page number
is used to index into the page table
, to get the corresponding page frame number
, and once we have the page frame of the physical memory
(also called main memory), we can apply the page offset
to get the right word of memory.
为什么要使用 TLB(Translation Look Aside Buffer)
问题是页表存储在物理内存
中,有时可能非常大,所以为了加快逻辑地址到物理地址的转换,我们有时会使用TLB
,它由昂贵且速度更快的关联内存组成,所以我们不是先进入页表,而是进入TLB
和使用页码
索引到TLB
中,得到对应的页框号
,如果找到,我们完全避免page表
(因为我们有页框编号
和页偏移
)并形成物理地址
.
The thing is that page table is stored in physical memory
, and sometimes can be very large, so to speed up the translation of logical address to physical address , we sometimes use TLB
, which is made of expensive and faster associative memory, So instead of going into page table first, we go into the TLB
and use page number
to index into the TLB
, and get the corresponding page frame number
and if it is found, we completely avoid page table
( because we have both the page frame number
and the page offset
) and form the physical address
.
TLB小姐
如果我们在TLB
中没有找到page frame number
,它被称为TLBmiss
,然后我们才去页表
查找对应的页框编号
.
If we don't find the page frame number
inside the TLB
, it is called a TLB miss
only then we go to the page table
to look for the corresponding page frame number
.
TLB 命中
如果我们在TLB
中找到page frame number
,则称其为TLB hit
,不需要去页表.
If we find the page frame number
in TLB
, its called TLB hit
, and we don't need to go to page table.
页面错误
当正在运行的程序访问的页面不在物理内存中时发生.这意味着该页面存在于辅助内存中,但尚未加载到物理内存的框架中.
Occurs when the page accessed by a running program is not present in physical memory. It means the page is present in the secondary memory but not yet loaded into a frame of physical memory.
缓存命中
Cache Memory 是一种比物理内存运行速度更快的小内存,我们总是先去缓存再去物理内存.如果我们能够在cache内部的cache memory中找到对应的word,它就叫做cache hit
,我们甚至不需要去物理内存.
Cache Memory is a small memory that operates at a faster speed than physical memory and we always go to cache before we go to physical memory. If we are able to locate the corresponding word in cache memory inside the cache, its called cache hit
and we don't even need to go to the physical memory.
缓存未命中
只是在映射到cache memory
后,找不到对应的block
(block
类似于物理内存pageframe
) 缓存中的内存(称为 cache miss
),然后我们转到 物理内存
并执行所有通过 页表
或 TLB
.
It is only after when mapping to cache memory
is unable to find the corresponding block
(block
similar to physical memory page frame
) of memory inside cache ( called cache miss
), then we go to physical memory
and do all that process of going through page table
or TLB
.
所以流程基本上是这样
1.首先进入缓存
,如果它是缓存命中
,那么我们就完成了.
1.First go to the cache memory
and if its a cache hit
, then we are done.
2.如果是缓存未命中
,请转到第 3 步.
2. If its a cache miss
, go to step 3.
3.首先进入TLB
,如果它是TLB hit
,使用物理地址
形成的物理内存,我们就完成了.
3. First go to TLB
and if its a TLB hit
, go to physical memory using physical address
formed, we are done.
4.如果它是TLB未命中
,则转到页表
以获取用于形成物理地址
的页面的帧号.
4. If its a TLB miss
, then go to page table
to get the frame number of your page for forming the physical address
.
5.如果找不到 page
,则是 page fault
.如果所有帧都被其他页面占用,请使用 page 替换算法
之一只需将所需页面从secondary memory
加载到physical memory
帧.
5. If the page
is not found, its a page fault
.Use one of the page replacement algorithms
if all the frames are occupied by some page else just load the required page from secondary memory
to physical memory
frame.
尾注
我讨论的流程与虚拟缓存(VIVT)有关(更快但不能在进程之间共享),在物理缓存(PIPT)(较慢但可以在进程之间共享)的情况下,流程肯定会改变.缓存可以通过多种方式寻址.如果您愿意深入了解,请查看这个和这个.
The flow I have discussed is related to virtual cache(VIVT)(faster but not sharable between processes), the flow would definitely change in case of physical cache(PIPT)(slower but can be shared between processes). Cache can be addressed in multiple ways. If you are willing to dive deeply have a look at this and this.
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