为什么CPU存取存储器字边界？ [英] Why does CPU access memory on a word boundary?

问题描述

我听到了很多数据应在内存中正确对齐为更好的访问效率。一个字边界CPU存取存储器。

I heard a lot that data should be properly aligned in memory for better access efficiency. CPU access memory on a word boundary.

因此​​，在下面的情况下，CPU有做2个内存访问得到一个字。

So in the following scenario, the CPU has to make 2 memory accesses to get a single word.

Supposing: 1 word = 4 bytes

("|" stands for word boundary. "o" stands for byte boundary)


|----o----o----o----|----o----o----o----|   (The word boundary in CPU's eye)
           ----o----o----o----              (What I want to read from memory)

为什么要这样呢？ 什么是CPU的根本原因只能在字边界读？

如果CPU可以仅在4个字节的字边界访问，地址线应该只需要30bit的，而不是32位的宽度。在CPU的眼睛原因的最后2位始终为0。

If the CPU can only access at the 4-byte word boundary, the address line should only need 30bit, not 32bit width. Cause the last 2bit are always 0 in CPU's eye.

和甚至更多，如果我们承认，CPU必须在字边界读，为什么不能在边界在我想去的地方开始阅读？看来这个边界的固定在CPU的眼球。

And even more, if we admit that CPU must read at the word boundary, why can't the boundary start at where I want to read? It seems that the boundary is fixed in CPU's eye.

根据<青霉> AndreyT 的，似乎边界设置是硬连线的，它是由存储器存取硬件硬连线。 CPU仅仅是无辜的，只要这个有关。

According to AndreyT, it seems that the boundary setting is hardwired and it is hardwired by the memory access hardware. CPU is just innocent as far as this is concerned.

非常感谢...

推荐答案

中可以在这种情况下（... CPU可以访问...）的含义取决于硬件平台。

The meaning of "can" (in "...CPU can access...") in this case depends on the hardware platform.

在x86平台CPU的可以的绝对上对齐存取数据的任何的边界，不仅对单词边界。未对齐的访问可能会比一致的访问效率较低，但原因为何有绝对无关，与CPU。它拥有一切跟下面的低级别的内存访问硬件的工作原理。它很可能是在这种情况下，存储器相关的硬件将不得不作出两次访问的实际存储器，但是这件事情在CPU不知道并且不需要了解。至于CPU而言，它可以访问任何边界上的任何数据。

On x86 platform CPU can access data aligned on absolutely any boundary, not only on "word boundary". The misaligned access might be less efficient than aligned access, but the reasons for that have absolutely nothing to do with CPU. It has everything to do with how the underlying low-level memory access hardware works. It is quite possible that in this case the memory-related hardware will have to make two accesses to the actual memory, but that's something the CPU doesn't know about and doesn't need to know about. As far as CPU is concerned, it can access any data on any boundary.

在如Sun SPARC，CPU的硬件平台不能的访问不对齐的数据（用通俗的话说，如果尝试你的程序将崩溃），这意味着，如果由于某种原因，你需要执行这种的未对齐的访问，你必须把它分成两个（或更多）在访问CPU的水平。

On hardware platforms like Sun SPARC, CPU cannot access misaligned data (in simple words, your program will crash if you attempt to), which means that if for some reason you need to perform this kind of misaligned access, you'll have to split it into two (or more) accesses at CPU level.

至于为什么是这样......好，这是计算机内存的硬件是多么的现代作品。该数据必须被对准。如果未对准时，存取要么是效率较低或根本不工作。

As for why it is so... well, that's just how modern computer memory hardware works. The data has to be aligned. If it is not aligned, the access either is less efficient or does not work at all.

现代存储器的一个非常简化的模型将是细胞（行和列），每个单元存储数据的一个字的网格。可编程机器人臂，可以把一个字转换成特定的细胞，并从特定小区检索词。一次一个。如果您的数据分布在多个单元S $ P $垫，你没有别的选择，只能使之与机械臂连续几个旅行。在某些硬件平台组织这些连续行程的任务由CPU隐藏（即臂本身知道做组装从几片所需的数据的），在某些其他的平台是到CPU可见（即它是谁是负责组织臂这些连续跳闸）CPU。

A very simplified model of modern memory would be a grid of cells (rows and columns), each cell storing a word of data. A programmable robotic arm can put a word into a specific cell and retrieve a word from a specific cell. One at a time. If your data is spread across several cells, you have no other choice but to make several consecutive trips with that robotic arm. On some hardware platforms the task of organizing these consecutive trips is hidden from CPU (meaning that the arm itself knows what to do to assemble the necessary data from several pieces), on some other platforms it is visible to the CPU (meaning that it is the CPU who's responsible for organizing these consecutive trips of the arm).

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