什么是ARM11的改进缓存 [英] What is the improvement in ARM11 for cache

问题描述

它在ARM11说，高速缓存的物理处理，解决许多缓存锯齿问题，减少环境切换开销

如何理解物理寻址？
它是如何帮助解决缓存锯齿问题并减少上下文切换开销？

How to understand physically addressed? How does it help to solve the cache aliasing problems and to reduce the context switch overhead?

推荐答案

有三种常见的缓存。

• VIVT =虚地址索引几乎标记


• VIPT =虚地址索引物理标记


• PIPT =身体变址物理标记

还有

• PIVT =身体变址几乎标记

PIPT通常用于2级和更深入的高速缓存，因为物理地址必须在那个时刻无论如何已知的，但用于ARMv7还引入PIPT L1 DCaches。 PIVT不是真正实用等未在现实世界中使用。

PIPT is usually used for 2nd Level and deeper caches because the physical address has to be known at that moment anyway, but armv7 also introduced PIPT L1 DCaches. PIVT is not really practical and so not used in the real world.

不同的是高速缓存行是如何连接到底层存储器

The difference is how the cache lines are connected to the underlying memory.

实际上索引意味着纯高速缓存行查找与虚拟地址完成的，因此可以前的任何虚拟到物理的地址转换来完成。然后标记将决定是否在高速缓存线确实映射到您的底层存储器或包含数据的量恰好映射到相同的高速缓存行的一些其它存储器位置

Virtually Indexed means that the pure cache line lookup is done with the virtual address and so can be done BEFORE any Virtual to Physical address-translation. The tagging then will decide if the cache line really maps to your underlying memory or contains data for some other memory location which happens to map to the same cache line.

如果该标记与该虚拟地址，然后两个进程这碰巧使用相同的虚拟地址可以跳闸对方，因为一个进程可能会访问该其它工艺投入高速缓存数据进行。因此，对于一个VIVT缓存的CPU内核刷新上下文切换对整个缓存。因此，新的进程将不是偶然的，这意味着在一般情况下，交换机上VIVT缓存的CPU一个非常昂贵的操作访问不正确的数据。在ARMv5及更高版本以上的有用于所谓的快速上下文切换扩展，它与标签修改虚拟地址的支持。但是，这涉及到很多的局限性。

If the tagging is done with the virtual address then two processes which happen to use the same virtual address could trip on each other, because one process might access data which the other process put into the cache. So for a VIVT-cached cpu the kernel has to flush the whole cache on a context-switch. So the new process will not access incorrect data by accident, which means in general a context-switch is a VERY expensive operation on VIVT-cached CPUs. On ARMv5 and upwards there is support for so called Fast Context Switch Extensions, which modifies the virtual address with an tag. But that involves a lot of limitations.

在相反VIPT仍将使用虚拟地址来查找的高速缓存行，但随后将检查对物理地址的标记，因此对与MMU查找可以并行完成到高速缓存行查找

In contrast VIPT will still use the virtual address to find the cache line, but then will check the tag against the physical-address, so the MMU lookup can be done in parallel to the cache line lookup.

别名是VIVT​​-缓存另一大问题。由于两个虚拟地址可能指向同一个物理存储位置（当你的用户和内核空间之间共享内存可能发生）。所以，你可以有不同的数据，这是非常难以管理正常（明确冲洗，并以正确的顺序缓存无效）缓存两个位置。

Aliasing is another big problem with VIVT-caches. Because two virtual addresses might point to the same physical memory location (which might happen when you share memory between user and kernel space). So you could have two locations in your cache with different data, which can be very hard to manage properly (explicitly flushing and invalidating the cache in the right order).

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