如何在VHDL和Verilog中设置Eclipse以进行FPGA设计? [英] How to set up Eclipse for FPGA design in VHDL and Verilog)?

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问题描述

我是Eclipse的新手,我将其用于软件开发以及在Altra环境中用于Nios处理器。但是现在,我有一个非常大的项目需要管理,我想使用Eclipse将系统中的所有文件都包含在内,以使其更易于管理和更新。

I am new with Eclipse, I have used it for SW development and in Altra environment for Nios processor. But now, I have a pretty large project that I have to manage and I would like to use Eclipse to have all the files in the system to make it easier to manage and update.

该项目具有用于各种IP的多个目录,并且具有针对ASCI,Xilinx和Altera FPGA的多个目标。在不久的将来,该项目将同时支持NIOS,Microblaze和ARM处理器,如果可能的话,我真的很想将整个项目保存在一个Eclipse项目文件中。我尝试了几种不同的选择,但似乎都无法正常工作。

The project has multiple directories for various IPs and has multiple targets for ASCI, Xilinx and Altera FPGAs. In a near future the project will support both NIOS, Microblaze and ARM processors and I would really like to keep the whole project in one Eclipse project file if possible. I have tried several different options, but nothing seems to work properly.

我正在寻找一些免费软件,而不是像Sigasi这样的商业程序。

I am looking for some freeware and not commercial programs like Sigasi.

在此先感谢
Farhad

Thanks in advance, Farhad

这是一个更新,目的是让其他人知道我的进度。

This is an update to let others know about my progress.

好吧,我终于设法使它开始工作。

Well, I finally managed to get it to work.


  • 我在PC上安装了最新版本的 Eclipse
  • >
  • 安装了Java 6版本(我唯一可以使用的版本)

  • 安装了 VEditor 插入Eclipse。

  • 在我的PC上的P盘上挂载了Linux项目目录

  • 在Eclipse中创建了一个新项目,并将其链接到P驱动器上。

  • I installed the latest version of Eclipse on my PC
  • Installed version 6 of Java (the only one I could get to work)
  • Installed the latest version of the VEditor into Eclipse.
  • Mounted the Linux project directory as my P disk on PC
  • created a new project in Eclipse and linked it to the one on the P drive.

花了一些时间才弄清楚这一点,但现在它可以正常工作了。

It took some time to figure this out, but it now works perfectly.

推荐答案

这些是我所知道的:

  • Veditor (beta) - http://sourceforge.net/projects/veditor/
  • sigasi free - http://www.sigasi.com/sigasi-starter-edition
  • signs (no longer in development) - http://sourceforge.net/projects/signs/
  • zamiaCAD (replacement of signs) - http://zamiacad.sourceforge.net/web/

这篇关于如何在VHDL和Verilog中设置Eclipse以进行FPGA设计?的文章就介绍到这了,希望我们推荐的答案对大家有所帮助,也希望大家多多支持IT屋!

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