ARM Linux上注册多个快速中断源 [英] Registering multiple Fast interrupt sources on ARM Linux

问题描述

我一直与Linux的中断ARM的：

I have been working with the Linux interrupt on ARM:

• 的request_irq（）可用于注册中断。

• request_irq() can be used to register an interrupt.

在一个中断信号线就可以注册 SHA_SHIRQ 多个中断，即正常的IRQ。

On a single interrupt line you can register multiple interrupts with SHA_SHIRQ, i.e normal IRQ.

• 在特定中断行所做的Linux允许注册多个SA_INTERRUPT？


• 这是我们可以注册多个中断处理程序为ARM的快速中断或 FIQ S'

• On a particular interrupt line does Linux allow to register multiple SA_INTERRUPT ?
• That is can we register multiple interrupt handlers for an ARM fast interrupts or FIQs?

推荐答案

像 IRQ 的 FIQ 有单点距离矢量表条目。你必须检查基于比特/数字来处理特定的 FIQ 中断控制器和分支。对于 FIQ ，这往往否定的分组寄存器既是程序将不得不分享。它可能有一个 FIQ 常规拥有的分组寄存器和其他人明确地保存它们。

Like the IRQ, the FIQ has a single point of entry from the vector table. You must inspect the interrupt controller and branch based on a bit/number to handle the specific FIQ. For the FIQ, this tends to negate the banked registers as both routines would have to share them. It is possible to have one FIQ routine own the banked registers and the others explicitly save them.

的<一个href=\"http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=blob;f=arch/arm/kernel/fiq.c;hb=HEAD\"相对=nofollow>目前Linux FIQ code 支持FIQ处理程序堆栈，而不是多个同时 FIQ 来源。您code可以使用<一个href=\"http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=blob;f=arch/arm/kernel/fiqasm.S;hb=HEAD\"相对=nofollow> set_fiq_regs（）初始化 FIQ 寄存器。您可以指定一个中断控制器基址和有code，它考察中断源并跳转到相应的处理程序。 注意：，内核不提供任何<一个href=\"http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=blob;f=arch/arm/include/asm/fiq.h;hb=HEAD\"相对=nofollow>沟通机制与 FIQ 。您必须编写自己的互锁。我认为FIFO实现应该是 FIQ 安全以及其他的锁定免费内核模式。

Thecurrent Linux FIQ code supports stacking of FIQ handlers and not multiple simultaneous FIQ sources. Your code can use set_fiq_regs() to initialize FIQ registers. You may assign an interrupt controller base address and have code that inspects the interrupt source and branch to the appropriate handler. Note:, the kernel doesn't provide any communication mechanism with the FIQ. You will have to write your own interlocks. I think that the FIFO implementations should be FIQ safe as well as other lock free kernel patterns.

编辑：这是 FIQ 的主线code的样本。它是一个IMX SSI驱动程序。
<一href=\"http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=blob;f=arch/arm/mach-imx/ssi-fiq.S;hb=HEAD\"相对=nofollow> SSI汇编，<一个href=\"http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=blob;f=arch/arm/mach-imx/ssi-fiq-ksym.c;hb=HEAD\"相对=nofollow>符号接口，<一个href=\"http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=blob;f=sound/soc/fsl/imx-pcm-fiq.c;hb=HEAD\"相对=nofollow>主文件。 FIQ 也被称为软DMA 。在 FIQ 延迟非常小，应该让高服务的频率。通常只有一个需要此注意单个设备。你可以在你的处理器（源数支/函数调用/指针）解复用。原因一 FIQ 往往是用汇编写的是的性能的，如果你用这个是隐含的。此外， FIQ 通常不会的屏蔽并会增加 IRQ 延迟作为系统的其余部分。使其更快通过汇编编码减少了 IRQ 延迟

Here is a sample of FIQ in the mainline code. It is an IMX SSI driver. SSI assembler, Symbol interface, main file. FIQ is also known as soft DMA. The FIQ latency is very small and should allow high service frequencies. Usually there is only a single device that needs this attention. You can demultiplex in your handler (branch/function call/pointer on source number). The reason a FIQ is often written in assembler is that performance is implicit if you use this. Also, the FIQ will not normally be masked and it will increase IRQ latency for the rest of the system. Making it faster by coding in assembler reduces the IRQ latency.

参见：<一href=\"http://stackoverflow.com/questions/973933/what-is-the-difference-between-fiq-and-irq-interrupt-system\">FIQ-IRQ差异

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