将 n 位的 std_logic_vector 向右或向左移动 [英] shift a std_logic_vector of n bit to right or left

问题描述

我有一个向量 信号 tmp : std_logic_vector(15 downto 0)

我必须将它移到 n 位的左侧或右侧.我怎样才能实现这个操作.想过拼接操作，但不知道怎么用.

I have to shift it to left or right of n bit. how can I realize this operation. I thought to concatenation operation but I didn't know how use it.

推荐答案

使用 ieee.numeric_std 库，以及您正在处理的数字的适当向量类型(unsignedcode> 或 signed).

Use the ieee.numeric_std library, and the appropriate vector type for the numbers you are working on (unsigned or signed).

然后运算符是 sla/sra 用于算术移位(即在右移时填充符号位，左移时填充 lsb)和 sll/srl 用于逻辑移位(即用0"填充).

Then the operators are sla/sra for arithmetic shifts (ie fill with sign bit on right shifts and lsb on left shifts) and sll/srl for logical shifts (ie fill with '0's).

您将参数传递给运算符以定义要移位的位数:

You pass a parameter to the operator to define the number of bits to shift:

A <= B srl 2; -- logical shift right 2 bits

更新:

我不知道我在上面写了什么(感谢 Val 指出这一点！)

Update:

I have no idea what I was writing above (thanks to Val for pointing that out!)

当然，转换 signed 和 unsigned 类型的正确方法是使用定义的 shift_left 和 shift_right 函数在 ieee.numeric_std 中.

Of course the correct way to shift signed and unsigned types is with the shift_left and shift_right functions defined in ieee.numeric_std.

移位和旋转运算符 sll、ror 等 用于boolean、bit 或std_ulogic 的向量，并且可以有有趣的意外行为，即使在移位时，算术移位也会复制结​​束位离开了.

The shift and rotate operators sll, ror etc are for vectors of boolean, bit or std_ulogic, and can have interestingly unexpected behaviour in that the arithmetic shifts duplicate the end-bit even when shifting left.

更多历史可以在这里找到:

And much more history can be found here:

http://jdebp.eu./FGA/bit-shifts-in-vhdl.html

然而，原问题的答案仍然是

However, the answer to the original question is still

sig <= tmp sll number_of_bits;

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